This invention relates generally to a process for fabricating an integrated circuit structure, and more specifically to devices having polycrystalline silicon contacts and to a process for their manufacture.
There is a need in the integrated circuit art for obtaining smaller and smaller devices without sacrificing device performance. The small device size requires small device regions, precise alignment between regions and minimization of parasitic resistances and capacitances. Device size can be reduced by putting more reliance on fine line lithography, but as device shrinking continues, it becomes impractical or impossible to continue to reduce feature size and achieve the required greater and greater alignment accuracy. As lithography is pushed to the limit, yield and production throughput decrease.
In view of the desire for integrated circuits having higher device counts, smaller device sizes, and greater circuit performance, a need continues to exist for an improved process to manufacture the required devices without resorting to unrealistic photolithography requirements.
Accordingly, it is an object of this invention to provide an improved process and structure for fabricating integrated circuit devices.
It is another object of this invention to provide an improved process and structure for producing integrated circuit devices of reduced size with reasonable photolithography tolerances.
It is yet another object of this invention to provide an integrated circuit process and structure for fabricating improved NPN and PNP transistors and other devices simultaneously.
It is a still further object of this invention to provide an improved process and structure for fabricating devices with polycrystalline silicon electrode contacts in integrated form.
As used herein, the words "block-out mask" are intended to refer to a mask or its corresponding patterned resist image or equivalent, which provides one or more open regions and closed regions which need not be precisely aligned to preceding fabrication patterns or masks. A block-out mask is typically used to protect certain openings or predetermined areas of the structure created by one or more earlier masks from etching or implantation steps intended to proceed through the open regions of the block-out mask and other openings in the earlier masks or layers.
The words "intrinsic" or "internal" in connection with a base region or the like are used herein to refer to the active portion of the base of a transistor between the emitter and collector or equivalent. The words "extrinsic" or "external" or "extended" in connection with a base region or the like are used herein to refer to the inactive portion of the base or the like, for example, the portion of a bipolar transistor base laterally exterior to the intrinsic base region which is typically used to provide contact to the intrinsic base region.